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B3L-05
ISCAS 2023
|
Technical Lecture and Demo

Analog Design Methodology & Automation

San Carlos IV (Marriott)

Circuit-GNN: A Graph Neural Network for Transistor-Level Modeling of Analog Circuit Hierarchies

Presented Date:Jul 02, 02:24pm UTC
ID: 2179
Author(s): Zhengfeng Wu, Ioannis Savidis

Block-Level Power Net Routing of Analog Circuit Using Reinforcement Learning

Presented Date:Jul 02, 02:24pm UTC
ID: 2248
Author(s): Taeyoung Kim, Gangmin Cho, Youngsoo Shin

Computational Efficiency of Circuit Design and Optimization Algorithms: A Comparative Study

Presented Date:Jul 02, 02:24pm UTC
ID: 2286
Author(s): Alec Adair, Armin Tajalli

Design of Low-Power Analog Circuits in Advanced Technology Nodes Using the Gm/ID Approach

Presented Date:Jul 02, 02:24pm UTC
ID: 2291
Author(s): Christian Enz, Hung-Chi Han, Simon Berner

Resistive Feedback LNA Design Using a 7-Parameter Design-Oriented Model for Advanced Technologies

Presented Date:Jul 02, 02:24pm UTC
ID: 2309
Author(s): Mohamed Khalil Bouchoucha, Dayana Andrea Pino-Monroy, Patrick Scheer, Philippe Cathelin, Jean Michel Fournier, Manuel Barragan, Andreia Cathelin, Bourdel Sylvain
Chair(s)
Armin Tajalli Headshot
Armin Tajalli
Affiliation
University of Utah
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Fernando Silveira Headshot
Fernando Silveira
Affiliation
Facultad de Ingeniería, Universidad de la República, Uruguay
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