This paper presents a simple and efficient methodology for LNA design which uses the inversion level of the transistor as a design parameter in order to optimize the energy efficiency. The method uses a simple but accurate 7 parameter-based model valid in all regions of operation and allows an accurate preliminary sizing based on an analytical study. The proposed model describes the main short-channel effects in advanced technologies and allows an analytical evaluation of the LNA nonlinearity. A use case using a 28 nm FD-SOI technology is proposed to reflect that the methodology is well suited for designs at weak to moderate inversion level in an advanced technology for which simulation-based studies are often used for early sizing.