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Presentations
Influence of Excess Loop Delay on the STF of Continuous-Time Delta-Sigma Modulators
Presented Date:Jul 04, 07:37pm UTCPresenter(s): Michael Pietzko
A Back-Gate-Input Clocked Comparator with Improved Speed and Reduced Noise in 22-nm SOI CMOS
Presented Date:Jul 04, 07:37pm UTCPresenter(s): Haoyu Zhuang
A Bootstrapped Switch with Accelerated Rising Speed and Reduced On-Resistance
Presented Date:Jul 04, 07:37pm UTCPresenter(s): Haoyu Zhuang
A High Linearity Driver with Embedded Interleaved Track-and-Hold Array for High-Speed ADC
Presented Date:Jul 04, 07:37pm UTCPresenter(s): Alessio Di Pasquo
A Higher-Order Programmable Amplitude and Timing Error Shaping Bandpass DEM for Nyquist-Rate D/A Converters
Presented Date:Jul 04, 07:37pm UTCPresenter(s): Shantanu Mehta
A 12 Bit 8 GS/s Randomly-Time-Interleaved SAR ADC with Adaptive Mismatch Correction
Presented Date:Jul 04, 07:37pm UTCPresenter(s): Sebastian Linnhoff
Time Interleaved ADC Mismatch Error Correction Technique in I/Q Digital Beamforming Receivers
Presented Date:Jul 04, 07:37pm UTCPresenter(s): Pavlos Athanasiadis
Chairs
Chair(s)
Display Name
Jerald Yoo
- Affiliation
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AffiliationNational University of Singapore
- Country
Display Name
Aatmesh Shrivastava
- Affiliation
-
AffiliationNortheastern University, Boston, MA
- Country