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Video s3
    Details
    Poster
    Presenter(s)
    Sebastian Linnhoff Headshot
    Affiliation
    Affiliation
    Technische Universität Berlin
    Country
    Abstract

    This paper presents a wideband 12Bit 8GS/s TI SAR ADC, featuring a sub-2 radix architecture and randomized sampling with mismatch correction in a 28nm CMOS technology. For this purpose, 18 500MHz SAR-ADCs plus an additional reference ADC are interleaved. Furthermore, the additional reference ADC operating in parallel to the main ADC enables adaptive digital calibration to correct for static and time-interleaved mismatch effects. After calibration, the ADC achieves a SNDR of 56.8dB and a SFDR of 80dBc applying a single full scale sine wave tone close to the Nyquist frequency of 4GHz.

    Slides
    • A 12 Bit 8 GS/s Randomly-Time-Interleaved SAR ADC with Adaptive Mismatch Correction (application/pdf)