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Technical Lecture and Demo

AI/ML for IC Design and EDA

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Automating Analog Layout: Why This Time is Different

Presented Date:Jul 01, 04:21am UTC
ID: 73
Presenter(s): Sachin Sapatnekar

Machine Learning-Powered Tools and Methodologies for 3D Integration

Presented Date:Jul 01, 04:21am UTC
ID: 74
Presenter(s): Sung-Kyu Lim

ML for Verification

Presented Date:Jul 01, 04:21am UTC
ID: 75
Presenter(s): Shobha Vasudevan

Machine Learning for DFM

Presented Date:Jul 01, 04:21am UTC
ID: 76
Presenter(s): Bei Yu

ML for Testing and Yield

Presented Date:Jul 01, 04:21am UTC
ID: 77
Presenter(s): Li-C. Wang

ML for Cross-Layer Reliability and Security

Presented Date:Jul 01, 04:21am UTC
ID: 78
Presenter(s): Muhammad Shafique

Exchanging EDA data for AI/ML using Standard API

Presented Date:Jul 01, 04:21am UTC
ID: 79
Presenter(s): Kerim Kalafala

IEEE CEDA DATC RDF and METRICS2.1: Toward a Standard Platform for ML-Enabled EDA and IC Design

Presented Date:Jul 01, 04:21am UTC
ID: 80
Presenter(s): Jinwook Jung

Machine Learning for EDA Optimization

Presented Date:Jul 01, 04:21am UTC
ID: 81
Presenter(s): Mark Ren

Learning to Optimize

Presented Date:Jul 01, 04:21am UTC
ID: 82
Presenter(s): Ismail Bustany

Circuit Training: An open-source framework for generating chip floor plans with distributed deep reinforcement learning

Presented Date:Jul 01, 04:21am UTC
ID: 83
Presenter(s): Joe Jiang