Memristors are promising nanoelectronic devices for the implementation of future AI driven sensor-processor electronic systems, which are essential for the ongoing digitalization of our world. Accurate and calculation cost-effective models for the fabricated memristors are essential for the design of such systems, especially for large circuit simulation. In this work we are addressing the simplification of the JART memristor model, a generic physics-based model of Valence Change Mechanism (VCM) memristors that accurately describe the dynamic behavior of fabricated memristor devices. Therefore, the simplified model and simplification methodology, proposed here, have the potential to capture the dynamics of a wide range of memristor devices. Importantly, the implicit description of the electrical current through the memristor is replaced by an explicit mathematical relationship. The proper reproduction of memristor dynamics, verified using the system-theoretic Dynamic Route Map (DRM) graphical analysis tool for first-order systems, can be observed by the proposed simplified model, allows the time-efficient simulation of large arrays of VCM devices.