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Presentations
A 14-Bit Oversampled SAR ADC with Mismatch Error Shaping and Analog Range Compensation
Presented Date:Jul 04, 07:29pm UTCID: 1837
A 0.0033 mm² 3.5 fJ/Conversion-Step SAR ADC with 2 Input Range Boosting
Presented Date:Jul 04, 07:29pm UTCID: 1930
A 10b 1.25GS/s Residue Post-Amplified Pipelined-SAR ADC with Supply-and-Temperature Stabilized Open-Loop Residue Amplifier
Presented Date:Jul 04, 07:29pm UTCID: 1407
Author(s): Xinsheng Wang, Maosong Shi, Peizhe Li, Jianwei Liu, Zhangcheng Huang, Chixiao Chen, Jun Tao
Transition Point Estimation Using RC-Filtered Square Wave for Calibration of SAR ADC
Presented Date:Jul 04, 07:29pm UTCID: 1955
A Foreground LSB-Based Capacitor Mismatch Calibration Method in an 18-Bit SAR ADC
Presented Date:Jul 04, 07:29pm UTCID: 2032
Chairs
Chair(s)
Display Name
Jerald Yoo
- Affiliation
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AffiliationNational University of Singapore
- Country
Display Name
Matt Johnston
- Affiliation
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AffiliationOregon State University
- Country