DAC mismatch is a major challenge for high-resolution ADCs. This paper proposes an analog-detection-based input range compensation technique for high-resolution ADCs with mismatch error shaping. By applying a pre-comparison and smartly switching the DAC MSB, the input loss caused by MES is compensated. By adopting a flying-capacitor sampling technique, the prediction errors found in prior solutions are avoided. The prototype 14-bit SAR ADC achieves 80.4 dB SNDR and 93 dB SFDR in a 4 kHz signal bandwidth with an OSR of 16. It only occupies 0.0034 mm^2 and consumes 0.656 uW under a 0.8 V supply, leading to a Schreier figure-of-merit of 178.3 dB. These features make it suitable for miniaturized IoT and biomedical systems.