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Presentations
A Wide-Load-Range Tri-Mode Buck Converter with Seamless Mode Transition
Presented Date:Jul 04, 06:18pm UTCID: 1223
Presenter(s): Yanxia Yao
A Digital-Control Buck Converter with Dual Pulse-Skipping Modes for Internet of Things
Presented Date:Jul 04, 06:18pm UTCID: 1362
Presenter(s): Tsung-Wen Sun
Partitioning Scheme and Performance Analysis of Distributed Digital Low-Dropout Regulators in SoC
Presented Date:Jul 04, 06:18pm UTCID: 1491
Presenter(s): Xuliang Wang
A Self-Regulating Negative Charge Pump Using Multi-Phase Clock for Wideband ADCs
Presented Date:Jul 04, 06:18pm UTCID: 1502
Presenter(s): Haoran Wang
Chairs
Chair(s)
![Yan Lu Headshot](https://confcats-catavault.s3.amazonaws.com/CATAVault/ieeecass/master/files/styles/cc_user_photo/s3/user-pictures/20232.png?h=f803f42f&itok=LnfY7FH_)
Display Name
Yan Lu
- Affiliation
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AffiliationState-Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau
- Country