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Video s3
    Details
    Presenter(s)
    Christopher Bengel Headshot
    Affiliation
    Affiliation
    RWTH Aachen University
    Country
    Author(s)
    Affiliation
    Affiliation
    RWTH Aachen University
    Display Name
    Hsin-Yu Chen
    Affiliation
    Affiliation
    Peter Grünberg Institut PGI-10
    Display Name
    Henriette Padberg
    Affiliation
    Affiliation
    JARA-Fit and Inst. of Materials in Electrical Engineering and Information Technology II, RWTH Aachen
    Display Name
    Stefan Wiefels
    Affiliation
    Affiliation
    Peter Grünberg Institut PGI-7
    Display Name
    Qing-Tai Zhao
    Affiliation
    Affiliation
    Peter Grünberg Institut PGI-9
    Display Name
    Fengben Xi
    Affiliation
    Affiliation
    Peter Grünberg Institut PGI-9
    Display Name
    Vikas Rana
    Affiliation
    Affiliation
    Forschungszentrum Jülich GmbH
    Display Name
    Rainer Waser
    Affiliation
    Affiliation
    JARA-Fit and Peter Grünberg Institute PGI-7&10, Forschungszentrum Jülich GmbH
    Display Name
    Stephan Menzel
    Affiliation
    Affiliation
    Forschungszentrum Jülich GmbH
    Abstract

    For enabling Computation-in-Memory (CIM) concepts, memristive devices are generally integrated in a passive configuration or in an active configuration, where transistors are employed together with the memristive switches. However, the reliability and variability of the memristive devices might impact the performance of CIM circuits. In this work, we experimentally demonstrate the impact of device-to-device (D2D) and cycle-to-cycle (C2C) variability on a simple IMPLY logic gate realized in passive and active configurations. Our findings suggest that the success rate of the logic operation can be increased by exploiting the D2D variability in the memristive devices.

    Slides
    • Experimental and Theoretical Analysis of Stateful Logic in Passive and Active Crossbar Arrays for Computation-in-Memory (application/pdf)