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Presentations
An Automated Compiler for RISC-V Based DNN Accelerator
Presented Date:Jul 04, 06:19pm UTCID: 1881
Presenter(s): Zheng Wu
Author(s): Zheng Wu, Wuzhen Xie, Xiaoling Yi, Haitao Yang, Ruiyao Pu, Xiankui Xiong, Haidong Yao, Chixiao Chen, Jun Tao, Fan Yang
Algorithm-Hardware Co-Optimization for Cost-Efficient ML-Based ISP Accelerator
Presented Date:Jul 04, 06:19pm UTCID: 1908
Presenter(s): Dongyoung Rim
Dynamically Swappable Digit-Serial Multi-Precision Deep Neural Network Accelerator with Early Termination
Presented Date:Jul 04, 06:19pm UTCID: 1909
Presenter(s): Po-Chang Li
An Ultra Energy Efficient Streaming-Based FPGA Accelerator for Lightweight Neural Network
Presented Date:Jul 04, 06:19pm UTCID: 2047
Presenter(s): Shaoyi Chen
Variable-Precision Approximate Floating-Point Multiplier for Efficient Deep Learning Computation
Presented Date:Jul 04, 06:19pm UTCID: 1617
Presenter(s): Hao Zhang
Chairs
Chair(s)
Display Name
Hao Zhang
- Affiliation
- Country
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CountryChina
Display Name
Chip Hong Chang
- Affiliation
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AffiliationNanyang Technological University
- Country