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A1L-01
ISCAS 2022
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Technical Lecture and Demo

Data Converters (In-person)

Room 1

A Maximally-Digital VCO-ADC with Inherent Mixing Input Capability

Presented Date:Jul 07, 10:27am UTC
ID: 1439
Presenter(s): Victor Medina
Author(s): Victor Medina, Ruben Garvi, Eric Gutierrez, Luis Hernandez

A 13-Bit 1-MS/s SAR ADC with Rotation-Based Mismatch Error Cancellation

Presented Date:Jul 07, 10:27am UTC
ID: 1704
Presenter(s): Jing Zhang
Author(s): Jing Zhang, Lulu Zhang, Xiong Zhou, Maurits Ortmanns, Qiang Li

A SAR ADC with Reconfigurable Delay and Redundancy to Relax the Reference Driver

Presented Date:Jul 07, 10:27am UTC
ID: 1713
Presenter(s): Yuting Shen
Author(s): Yuting Shen, Hanyue Li, Eugenio Cantatore, Pieter J. A. Harpe

Complexity Reduced LUT-Based DAC Correction in Continuous-Time Delta-Sigma Modulators

Presented Date:Jul 07, 10:27am UTC
ID: 1773
Presenter(s): Bjoern Driemeyer
Author(s): Bjoern Driemeyer, Julian Spiess, John G. Kauffman, Maurits Ortmanns

A Fast Converging Correlation-Based Background Timing Skew Calibration Technique by Digital Windowing for Time-Interleaved ADCs

Presented Date:Jul 07, 10:27am UTC
ID: 1781
Presenter(s): Yunsong Tao
Author(s): Yunsong Tao, Kareem Ragab, Jin Shao, Pengpeng Chen, Yi Zhong, Lu Jie, Nan Sun
Chair(s)
Edoardo Bonizzoni Headshot
Edoardo Bonizzoni
Affiliation
Università degli Studi di Pavia
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Jose M. de la Rosa Headshot
Jose M. de la Rosa
Affiliation
Instituto de Microelectronica de Sevilla
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