Profile

I am an Electronics & Communications 4th Year Undergraduate at IIIT Delhi. I have been actively working in the field of Digital & Analog VLSI design, Design Verification, Memory Design & Testability, RTL to GDS-II Flow, Computer Architecture, HLS of VLSI Design & Embedded Systems, Formal & UVM Verification. I have completed several projects successfully in these domains and have relevant experience of working on EDA/CAD tools & software along with programming languages such as Verilog, SystemVerilog, SystemC, TCL, MATLAB & C/C++.