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Video s3
    Details
    Presenter(s)
    Swapnil Bansal Headshot
    Display Name
    Swapnil Bansal
    Affiliation
    Affiliation
    Indraprastha Institute Of Information Technology, Delhi
    Country
    Country
    India
    Author(s)
    Display Name
    Swapnil Bansal
    Affiliation
    Affiliation
    Indraprastha Institute Of Information Technology, Delhi
    Display Name
    Anuj Grover
    Affiliation
    Affiliation
    Indraprastha Institute of Information Technology, Delhi
    Abstract

    In life-critical applications like automobile systems, functional safety is of utmost importance. Early diagnosis of unforeseen faults and failures in the memory subsystem is necessary to prevent any potential threat to life. It is observed that Electromigration induced ageing failures such as open and short resistive defects pose extreme reliability concerns in the safe operation of SRAMs. This paper analyzes the consequences of resistive defects in the Write Driver periphery circuit in 65nm technology node. In the presence of defects in a conventional write driver circuit using a Negative BL scheme, the writability and the bit line discharge level degrades, eventually leading to write errors. We propose a process compensated circuit to detect and locate small resistive faults, as low as 3-4KOhm, in SRAM write drivers, before they result in functional failure. The test circuit can be easily integrated with the memory BIST.

    Slides
    • Process Compensated Diagnostic Circuit For Impending Fault Detection In SRAM Write Drivers (application/pdf)