Profile

The speaker finished his MS (Research) from IIT-Madras in 2011. From then he worked in Industry and academia for Eleven years mainly specializing in Phase locked loop Design. Previously (2016-2022) he served as an Assistant Professor at BITS Pilani Goa Campus. Currently he is working as a Senior Staff RF/Analog Engineer at Silicon Labs India. His areas of research are in High performance PLLs for wireline and wireless systems.