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Video s3
    Details
    Presenter(s)
    Chembiyan Thambidurai Headshot
    Affiliation
    Affiliation
    Birla Institute of Technology and Science, Pilani
    Country
    Author(s)
    Affiliation
    Affiliation
    Birla Institute of Technology and Science, Pilani
    Display Name
    Preetham Reddy
    Affiliation
    Affiliation
    Birla Institute of Technology and Science, Pilani
    Display Name
    Raghurama Gunaje
    Affiliation
    Affiliation
    Birla Institute of Technology and Science, Pilani
    Abstract

    A technique to eliminate reference spurs in both Integer-N and Fractional-N charge pump phase locked loops (PLLs) based on an oversampled loop filter architecture is proposed. A detailed analysis of the performance of the proposed technique in the presence of implementation non-idealities is also presented. It is shown through analysis and simulations that the proposed technique, in addition to completely eliminating reference spurs, adds an insignificant area and power overhead when applied to Integer-N PLLs and less than 6 % increase in area and power in case of Fractional-N PLLs.

    Slides
    • Reference Spur Reduction in Sampled-Loop Filter PLLs by Oversampling (application/pdf)