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Presentations
Common Mode Control Loop for Current Mode Logic-Based Circuits in FD-SOI Technology
Presented Date:Jul 07, 11:29am UTCID: 2302
Presenter(s): Marco Saif
A Second-Order Passive Noise-Shaping SAR ADC with 4× Passive Gain and a Two-Input-Pair Comparator
Presented Date:Jul 07, 11:29am UTCID: 2306
Presenter(s): Eric Wang
A 78nW, 814mV/875nA All-in-One Voltage and Current Reference Using Darlington Pair
Presented Date:Jul 07, 11:29am UTCID: 2310
Presenter(s): Yongyan Wang
Silicon-Proven Clockless Wave-Propagated Pipelining for High-Throughput, Energy-Efficient Processing
Presented Date:Jul 07, 11:29am UTCID: 2320
Presenter(s): Yehuda Kra