This brief presents a random number generator (RNG) based on irregular sampling of regular waveform method where the irregular signal is obtained by combining Fibonacci-Galois ring oscillators with an XOR gate. The RNG is implemented on a FPGA (field-programmable gate array). The regular waveform generated by the digital clock manager of the FPGA, is sampled at times corresponding to certain number of rising edges of the irregular signal, and the resulting bit stream is subjected to statistical tests of randomness. It is demonstrated that the resulting bit sequence from the proposed RNG satisfies NIST 800-22 test suit and Rabbit and SmallCrush batteries from TestU01 library without any need for post-processing such as Von Neumann or XOR. A comparison between the methods regular sampling of irregular waveform and irregular sampling of regular waveform is given in terms of robustness against external interference. The impact of selection of Fibonacci-Galois polynomials is discussed. Using digital design flow for TSMC 65nm process, an asic implementation of the proposed RNG is given having 1115 gates and 4.811 mW estimated power.