This work explores the use of asynchronous approximate multiply-accumulate (MAC) operators and research ways to alleviate the inherent area overhead of such circuits, while leveraging on its advantages. It analyzes several approximate MAC architectures, with varying error rates and area trade-offs. Several accurate and approximate, synchronous and asynchronous MAC operators are compared. Experiments show it is feasible to decrease the area overhead of the accurate asynchronous MAC from 8.1X down to 1.6X by recurring to approximate multipliers, for varying controlled error rates. The use of asynchronous quasi-delay insensitive (QDI) circuits allows applying extensive voltage scaling to all asynchronous MAC operators. Power and energy per operation can thus be significantly reduced, achieving savings of up to 2.66X in power and 3.17X in energy per operation when compared to the accurate asynchronous MAC.