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- Affiliation
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AffiliationUniversity of Isfahan
- Country
A 12-bit low-power SAR ADC with low-input capacitance is proposed. The topology exploits a separated block structure to achieve low-input capacitance. The separated block structure uses different sub-blocks for sampling and DAC. In this structure, the comparator input common-mode voltage is variable and, therefore, a rail-to-rail comparator with rail-to-rail offset cancellation is proposed to cancel the input common-mode dependent offset. The proposed comparator is modified to overcome the uneven distribution of kickback noise too. In order to achieve a 12-bit resolution, the bootstrapped switch is modified. With the aid of the proposed offset cancellation, kickback noise reduction and switch, the ADC achieves 11.08-bit ENOB and the input capacitance is reduced to 2 pF, leading to relatively low input power consumption with no need for a reference supply voltage.