Details
![Tripathi, Prateek Headshot](https://confcats-catavault.s3.amazonaws.com/CATAVault/ieeecass/master/files/styles/cc_user_photo/s3/user-pictures/prateek_photo.jpg?h=2c8e020b&itok=OGupoPga)
- Affiliation
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AffiliationImperial College London
- Country
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CountryUnited Kingdom
This paper introduces a linear weighted integrate and fire (I&F) neuron architecture for Ion-Sensitive Field-Effect Transistors (ISFETs). It contributes to the next generation of neuromorphic lab-on-chip (LoC) platforms with the aim to integrate electrochemical sensors with neural networks on-silicon to compensate for sensor non-idealities. The neuron consists of a readout circuit, a linear voltage-controlled weighting circuit, and a robust I&F circuit with low power consumption. Notably, the readout in the neuron circuit achieves linear conversion of input voltage to output current at low power. This work also presents a cluster architecture for spatial correlation of trapped charge effects and process variations. The calibration system integrated in each cluster is realized using a current bit cell chain inspired from the current mode algorithmic ADC. The compensation range for each pixel ranges from -157.7mV to 128.1mV. The system is implemented as a 25 X 20 cluster array, and the sensitivity of each cluster is 10.92kHz/pH.