A 31.4-39.9GHz mmWave PLL synthesizer for FMCW radar applications is proposed that consists of a complementary Colpitts-assisted class-B/C VCO, a programmable quadratic-curved charge pump, and a digital chirp-code generator. The complementary Colpitts oscillator is employed to supply more negative resistance around 40GHz. The charge pump produces quadratic-curved current to keep loop bandwidth constant. The fractional-N PLL synthesizer achieves locking range of 31.4-39.9GHz, a minimum FM rms error of 160 kHz, a high-speed chirp rate of 50us, and a maximum FM modulation bandwidth of 8.5 GHz. The PLL implemented by using 65nm CMOS process accomplishes phase noise of -89dBc/Hz at 1MHz offset from 33.9GHz and draws 60mW.