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Presenter(s)
Display Name
Carlos J. Bernal
- Affiliation
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AffiliationUniversity of Puerto Rico
- Country
Abstract
This paper presents an evaluation of the new JEDEC standard JEP173. The JEP173 establishes a characterization procedure to reliably assess the dynamic ON-resistance of GaN lateral power transistors. DC and pulsed measurement setups were developed to evaluate the proposed methods for hard and soft switching conditions. Several devices were tested under a wide range of test conditions. We found that the proposed procedures in JEP173 allow for accurate acquisition of the ON-resistance under several test conditions. However our experiment found the standard, in its current version, does not account for the stress voltage and temperature effects on the dynamic RDSON, leading to under-characterization of parts.