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Presenter(s)
![Mengting Yan Headshot](https://confcats-catavault.s3.amazonaws.com/CATAVault/ieeecass/master/files/styles/cc_user_photo/s3/user-pictures/13981_1.jpg?h=89eaebb6&itok=HSJx_5hx)
Display Name
Mengting Yan
- Affiliation
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AffiliationNortheastern University
- Country
Abstract
This paper presents a CMOS 2:1 differential parametric frequency divider (PFD) design with an output frequency of 2.4 GHz and an input voltage range of 450-890 mV at 4.8 GHz. The topology is suitable for integration into RF Systems-on-a-Chip (SoCs), and has been constructed for sub-6 GHz applications. A design and optimization methodology for this on-chip PFD is also described in this paper. The simulation results show a performance improvement of the proposed differential PFD compared to a single-ended PFD designed for the same output frequency in the same 65nm CMOS technology.