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Presentations
A Second-Order VCO-Based ΔΣ ADC with Fully Digital Feedback Summation
Presented Date:Jul 04, 05:59pm UTCID: 1377
Presenter(s): Chaoyang Xing
Systematic Design for Multistage Feed-Forward Op-Amp for High-Speed Continuous-Time Σ∆ ADCs
Presented Date:Jul 04, 05:59pm UTCID: 1088
Presenter(s): Marco Saif
A Charge-Redistribution Multi-Bit Stochastic-Resonance ADC Enhancing SNDR for Weak Input Signal
Presented Date:Jul 04, 05:59pm UTCID: 1366
Presenter(s): Ryoya Shibata
A Mismatch Compensation Scheme for Cyclic-Pipelined ADC via Dynamic Element Matching Technique
Presented Date:Jul 04, 05:59pm UTCID: 1943
Presenter(s): Yihao Yang
Mixed-Signal Integrated Circuit for Direct Raised-Cosine Filter Waveform Synthesis of Digital Signals Up to 24 GS/s in 22 nm FD-SOI CMOS Technology
Presented Date:Jul 04, 05:59pm UTCID: 1248
Presenter(s): Daniel Widmann
Chairs
Chair(s)
Display Name
Qiang Li
- Affiliation
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AffiliationUniversity of Electronic Science and Technology of China
- Country
Display Name
Nuno Paulino
- Affiliation
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AffiliationUniversidade Nova de Lisboa
- Country