ISICAS 2021
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Technical Lecture and Demo
ID 9568

A 600-μm2 Ring-VCO-Based Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS
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Presenter(s)
Shiheng Yang Headshot
Shiheng Yang
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Author(s)
Shiheng Yang
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Yan Lu
Affiliation
State-Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau
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Tailong Xu
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Taimo Yi
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Pui-In Mak
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Qiang Li
Affiliation
University of Electronic Science and Technology of China
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Rui Martins
Affiliation
University of Macau
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Slides
  • A 600-μm2 Ring-VCO-Based Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS (application/pdf)
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