Details
Poster
Presenter(s)
![Marcio Monteiro Headshot](https://confcats-catavault.s3.amazonaws.com/CATAVault/ieeecass/master/files/styles/cc_user_photo/s3/user-pictures/19851.jpg?h=fbf7a813&itok=VKWnVUv8)
Display Name
Marcio Monteiro
- Affiliation
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AffiliationUniversidade Federal de Santa Catarina
- Country
Abstract
This work evaluates alternatives for the design of power-efficient Gaussian Filters. The proposed optimization strategy combines: 1) a refactored function to minimize the arithmetic operations, and 2) a design space exploration investigating different approximation scenarios applied to the full adders. The exact version of our refactored Gaussian Filter architecture reduces the total power consumption and the circuit area by 18% and 12%, respectively compared with the baseline Gaussian Filter architecture. Moreover, the combination of different approximation levels with the refactored architecture provides design options with power reductions from 21% to 59% compared with the baseline Gaussian Filter architecture.