Profile

Matteo D’Addato received a Master degree in Electronic Engineering from the University of Bologna, Italy in March 2019. From April 2019 to October 2019, he worked as a Research Fellow at the ARCES-STMicroelectronics joint laboratory of the University of Bologna. He is currently pursuing a PhD at the University of Bologna. His research interests include the design of ultra-low-power analog and digital integrated circuits, Clock and Data Recovery architectures and RF circuits.