In this presentation, we will present the recent progresses on the compute-in-memory (CIM) prototype chips using the resistive random access memory (RRAM) technology. Mixed-signal RRAM based CIM can process the multiply-accumulate (MAC) functions in deep neural networks efficiently using the integrated analog-to-digital converter (ADC), thus it is regarded as a competitive solution for AI hardware design for edge intelligence. In collaboration with TSMC Corporate Research, we taped out two generations of RRAM CIM macros in TSMC 40 nm process. The following features are supported in these prototype chips: Adaptive input sparsity control Reconfigurable weight precision Integrated digital compute units Input-aware on-chip ADC reference On-chip write-verify controller Input encoding for embedded security ADC-less communication between sub-arrays with pulse-width-modulation In-situ error correction code that preserves the MAC parallelism Finally, the prospects and challenges of CIM chip design will be summarized.