Large weight variations cause significant degradation in DNNs accuracy in machine learning context. IGZO DRAM compute cell is a promising option for AiMC accelerators, but its applicability requires the large variations affecting the voltage threshold to be compensated. This paper proposes a write-verify scheme for IGZO-based AiMC accelerator, designed in 22-nm technology, based on a compensation loop operating on the analog weight value stored in the IGZO DRAM cell. After the compensation routine, the IGZO Ion normalized variation drops from 27.5% to 3% in simulation. With sufficiently large weight reuse, the additional energy used for the compensation of the entire arrays becomes negligible, recovering the baseline performance of an ideal IGZO array without the write-verify.