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Video s3
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    Author(s)
    Display Name
    Johannes Pfau
    Affiliation
    Affiliation
    Karlsruher Institut für Technologie
    Display Name
    Richard Leys
    Affiliation
    Affiliation
    Karlsruher Institut für Technologie
    Display Name
    Marc Neu
    Affiliation
    Affiliation
    Karlsruher Institut für Technologie
    Display Name
    Alexey Serdyuk
    Affiliation
    Affiliation
    Karlsruher Institut für Technologie
    Display Name
    Ivan Peric
    Affiliation
    Affiliation
    Karlsruher Institut für Technologie
    Display Name
    Jürgen Becker
    Affiliation
    Affiliation
    Karlsruher Institut für Technologie
    Abstract

    In this publication, we present our technological platform to teach SoC design in an integrated lab course: It takes students from writing the first line of Verilog code to advanced digital and analog design, introduces simulation of digital and analog systems, debugging methods for software and hardware, CPU bus architecture, custom peripherals and driver development. At the end of the semester, students will write technical documentation of their work. It enables students to apply theoretical aspects from various lectures in the curriculum in practice and equips them with the required skills to dive deeper into involved topics on their own.