Skip to main content
Video s3
    Details
    Presenter(s)
    Anand Pathak Headshot
    Display Name
    Anand Pathak
    Affiliation
    Affiliation
    Texas Instruments Bangalore
    Country
    Abstract

    One Time Programmable EPROM is one of the most popular embedded nonvolatile memory types owing to its small size, low cost and ease of integration. State of the art power management analog chips designed for smart meters, portable personal electronics and battery powered applications require their embedded memory IPs to be read at a very low voltage while also retaining the ability to read at high voltages without getting soft programmed. Conventional topologies fail to work at such a wide range owing to either insufficient Vds across the OTP EPROM component at very low voltages or unintentional programming at high voltages. These concerns are addressed in this paper through a novel low power current limiting scheme that includes a new current sensing bit cell architecture in conjunction with an ultra low spread current reference that helps achieve reading at ultra low voltage while also protecting the cell from soft program at high voltages.

    Slides