We propose a simplified and efficient apparatus for a CMB detector employing a cryogenic controller IC for a large TES (Transition Edge Sensor) array. The proposed apparatus significantly improves the passive heat load by reducing the number of wires originating from the room temperature electronics. In the current proposal, the cryogenic controller handles two critical circuit functions, namely the row multiplexer and the bias DAC. Those circuits can be scaled to handle a large number of channels required for the next generation of CMB telescopes with 500k detectors. As a step towards realizing such a solution, the aforementioned circuits are designed using a low power and low noise topology and simulated to verify system specification compliance. The circuit design is fabricated in Global Foundries 22nm FD-SOI CMOS process and is awaiting lab measurements.