A strategy for designing a high accuracy voltage reference operating at sub 1ppm per degC over a wide temperature range is introduced. The proposed design makes use of one of the popular and widely used bandgap voltage reference structures and the temperature dependence of the drain current of a single MOS transistor operating in subthreshold to build a sub-ppm per degC voltage reference. The effects of error sources which may affect the performance of the voltage reference are analyzed and minimized. Simulation results in the TSMC 180nm process show that the design can achieve temperature coefficients of less than 0.85ppm per degC across process corners and local random variations from -40degC to 125 degC after trimming.