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![Anh-Tien Le Headshot](https://confcats-catavault.s3.amazonaws.com/CATAVault/ieeecass/master/files/styles/cc_user_photo/s3/user-pictures/19011.jpg?h=955a9f58&itok=WPKJtgpP)
- Affiliation
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AffiliationUniversity of Electro-Communication
- Country
The goal of this research is to solve the cache side-channel attack problem on the open-source RISC-V architecture. Previously, software mitigation techniques and hardware modifications were investigated to address these issues. However, they are either difficult to implement or have resulted in significant performance loss. In this paper, we present a real-time detection method for cache side-channel attacks such as Spectre. We monitor the processor\'s cache behavior with Hardware Performance Counters and analyzing the collected data with a neural network. Because cache side-channels frequently result in a significantly altered cache usage pattern, our neural network is capable of detecting a Spectre attack in our test environment with an accuracy of more than 99%. In our understanding, this is the first time a run-time Spectre attack on the RISC-V architecture has been detected using hardware events and machine learning.