This paper presents a SAR-assisted first order incremental ΣΔ analog-to-digital converter (ADC) equipped with an accumulation based sample and hold (S/H) circuit to effectively limit its kT/C noise contribution, potential bottleneck for the resolution performance of the converter. This system has been designed for shunt current measurements in the electrical drives battery management framework; the sensed and digitized current information is needed for a proper monitoring and regulation of the behaviour of these essential devices for automotive applications. The converter has been developed at the behavioural level in the MATLAB-Simulink environment with special attention to the S/H circuit which has been analyzed in Cadence Virtuoso; the complete system features a high common mode voltage (HCMV) in the order of tens of Volts, a peak-to-peak 50 mV differential input range and a target resolution of 12 bits.