This work presents a high-resolution and low-power ADC architecture. Two innovations are proposed: first, we use a hybrid MASH DSM that combines the advantages of CT and DT DSM. It provides comparable performance to CT MASH, but it is free from RC tuning and insensitive to timing errors. Second, a passive CIFF NS-SAR ADC embedded in the back-end stage realizes the second-order noise-shaping effect and further improves the power efficiency.