Neuromorphic TinyML (vTinyML) aims at solving problems in machine perception and intelligence at the edge that necessitate low latency processing, using low resource processors that have neuromorphic event based sensory interfaces and neuromorphic accelerators. In this paper, we report on a neuromorphic TinyML architecture (vMCU) which can be leveraged to be deployed to process data from event-based sensors on the edge. The core of the system is a RISC-V CPU from SiFive which is used for algorithm development. This interfaces with a set of communication and computation peripherals which are comprised most notably of an event based physical interface has a 256Kib FIFO and a programmable 47bit time-stamping unit and an embedded Compute in Memory associative processor employs charge based processing and a pseudo-DRAM cell primitive. vMCU capability consumes 30mW and is demonstrated in various tasks for embedded applications, including character recognition from a DAVIS240C event based camera.