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Video s3
    Details
    Presenter(s)
    Baris Taskin Headshot
    Display Name
    Baris Taskin
    Affiliation
    Affiliation
    Drexel University
    Country
    Author(s)
    Display Name
    Ragh Kuttappa
    Affiliation
    Affiliation
    Drexel University
    Display Name
    Baris Taskin
    Affiliation
    Affiliation
    Drexel University
    Display Name
    Vinayak Honkote
    Affiliation
    Affiliation
    Intel Labs
    Display Name
    Satish Yada
    Affiliation
    Affiliation
    Intel Labs
    Affiliation
    Affiliation
    Intel Labs
    Display Name
    Dileep Kurian
    Affiliation
    Affiliation
    Intel Labs
    Display Name
    Tanay Karnik
    Affiliation
    Affiliation
    Intel
    Affiliation
    Affiliation
    Intel Labs
    Abstract

    Rotary traveling wave oscillators (RTWO) are designed to provide a high frequency clock signal through the silicon interposer to multiple chiplets in a heterogeneous 2.5D system. In particular, two different RTWO synchronization topologies are presented 1) active interposer RTWO and 2) passive interposer RTWO. The proposed topologies are evaluated across a silicon interposer dimension of 42mm  20mm. Each topology is implemented with post-layout, parasitic extracted models for a clock frequency of approx. 8GHz. The proposed topologies are investigated for clock period, skew, rise time, fall time, and oscillation start-up + settling times across the multi-die system (MDS) with SPICE based simulations.

    Slides
    • Resonant Rotary Clock Synchronization with Active and Passive Silicon Interposer (application/pdf)