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Video s3
    Details
    Presenter(s)
    Yuzong Chen Headshot
    Display Name
    Yuzong Chen
    Affiliation
    Affiliation
    Nanyang Technological University
    Country
    Author(s)
    Display Name
    Yuzong Chen
    Affiliation
    Affiliation
    Nanyang Technological University
    Display Name
    Junjie Mu
    Affiliation
    Affiliation
    Nanyang Technological University
    Display Name
    Hyunjoon Kim
    Affiliation
    Affiliation
    Nanyang Technological University
    Display Name
    Lu Lu
    Affiliation
    Affiliation
    Nanyang Technological University
    Affiliation
    Affiliation
    Nanyang Technological University
    Abstract

    This work presents BP-SCIM: a reconfigurable 8T SRAM macro for bit-parallel searching and computing in-memory (CIM). BP-SCIM can perform in-memory Boolean logic, arithmetic, and content-addressable memory (CAM) operations. Novel peripheral circuits and algorithms are proposed to support complex arithmetic operations such as multiplication and division. A 256 × 64 BP-SCIM test chip was implemented in 65-nm CMOS technology. The 8-bit addition and 8-bit multiplication operations can achieve the best energy efficiency of 3.11 TOPS/W and 0.17 TOPS/W, respectively at 0.7 V supply. For the binary CAM search operation, BP-SCIM can achieve the minimum energy consumption of 0.91 fJ/bit/search at 87 MHz and 0.8 V supply.

    Slides
    • A Reconfigurable 8T SRAM Macro for Bit-Parallel Searching and Computing In-Memory (application/pdf)