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    Author(s)
    Display Name
    Samuele Fusetto
    Affiliation
    Affiliation
    Università degli Studi di Pavia
    Affiliation
    Affiliation
    University of Pavia
    Display Name
    FRsco Cannillo
    Affiliation
    Affiliation
    Dialog Semiconductor GmbH
    Display Name
    Piero Malcovati
    Affiliation
    Affiliation
    Università degli Studi di Pavia
    Display Name
    Edoardo Bonizzoni
    Affiliation
    Affiliation
    Università degli Studi di Pavia
    Abstract

    This paper presents a strategy for optimizing power switch sizes in DC-DC converters, in order to maximize the power effciency. The proposed strategy is particularly well suited for multi-switch topologies, which have become increasingly widespread in recent years. The effectiveness of the proposed optimization strategy is demonstrated for the case of a 3-level inverting buck-boost converter, which has been studied in detail considering various combinations of input voltage, output voltage and load current. The goodness of the model is verified by comparing the calculated effciency results with the effciency values obtained through Cadence Virtuoso simulations. The derived regression index between the calculated and simulated effciency results exceeds 0.99 in most cases: the proposed model and optimization strategy, therefore, well match the simulation results.