An energy-efficient current-mode hybrid circuit topology for echo-cancellation is proposed for full-duplex signaling over chip-to-chip interconnects. Conventional full-duplex transceivers consists of three transcondutors, namely, for transmitting outbound signal, replica generation and for cancellation leading to increase in power consumption. However, proposed hybrid circuit topology consists of only two transconductors, transmitter and replica generator. The separation of inbound signal from signal on the line is achieved using a simple resistor, thereby eliminating need of additional transconductor for subtraction. This makes proposed hybrid attractive choice for realizing power efficient full-duplex transceiver compared to existing transceiver with current-mode and voltage-mode hybrid circuit topologies. The proposed hybrid is implemented in 1.2 V, 65nm CMOS technology. The post-layout simulation including package parasitic has differential received signal voltage swing of 85-mV at 10-Gb/s data rate over 20 cm FR4-PCB trace. Total power consumption of hybrid is 0.29-mW and corresponding energy efficiency is 0.057-pJ/bit.