A ring-oscillator based circuit is proposed for features extraction tasks within smart speech recognition and voice activity detectors applications. The architecture performs all the operations needed for conventional features extraction but making use of only time-encoded based circuits in the analog domain. This results in a compact and simple structure, easily scalable and suitable for the deepest CMOS nodes leading for ultra-low and small solutions. The proposal is described theoretically and functionally checked with behavioral simulations in MATLAB. Additionally, the filtering stage is designed in a 65-nm process and validated with transient simulations providing promising results referring estimated power and area.