Skip to main content
    Details
    Author(s)
    Display Name
    Qiong Li
    Affiliation
    Affiliation
    Nanjing University
    Display Name
    Fang Chao
    Affiliation
    Affiliation
    Nanjing University
    Display Name
    Zhongfeng Wang
    Affiliation
    Affiliation
    Nanjing University, China
    Abstract

    In this paper, we propose an open-source posit dot-product unit, namely PDPU, that facilitates resource-efficient and high-throughput dot-product hardware implementation. PDPU not only features the fused and mixed-precision architecture that eliminates redundant latency and hardware resources, but also has a fine-grained 6-stage pipeline, improving computational efficiency. A configurable PDPU generator is further developed to meet the diverse needs of various DNNs for computational accuracy. Experimental results evaluated under the 28nm CMOS process show PDPU reduces area, latency, and power by up to 43%, 64%, and 70%, respectively, compared to the existing implementations.