Stochastic computing (SC) is a type of logic computation that converts binary numbers to stochastic bitstream. It is a pseudo-analog computation in the digital domain that can realize multiplication, addition and complex function computations. In this paper, we present a new encoding method AFE(Amplitude and Frequency Encoding) for SC, which extend SC to use binary streams instead of bit streams to represent data. This new method still use the expectation of streams to achieve the computation. Compared with conventional stochastic bitstream, AFE we proposed realize low-latency and low-area occupation instead of the long latency of classic method. And we also discuss the rationality of circuits from a mathematical perspective. The hardware logic circuits of AFE-SC including multiplier, adder and converter are designed and implemented by FPGA. In addition, the latency of computing, area and precision of the AFE-SC is measured based on FPGA board.