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    Author(s)
    Display Name
    Baosheng Wang
    Affiliation
    Affiliation
    Nanjing University of Aeronautics and Astronautics
    Display Name
    Yijun Cui
    Affiliation
    Affiliation
    Nanjing University of Aeronautics and Astronautics
    Display Name
    Chongyan Gu
    Affiliation
    Affiliation
    Queen's University Belfast
    Display Name
    Chenghua Wang
    Affiliation
    Affiliation
    Nanjing University of Aeronautics and Astronautics
    Display Name
    Weiqiang Liu
    Affiliation
    Affiliation
    Nanjing University of Aeronautics and Astronautics
    Abstract

    In this work, a novel intrinsic physical unclonable function (PUF), Frequency Adjustable Software PUF (FAS-PUF), is proposed to provide a device identification for post-quantum cryptography (PQC) chips. FAS-PUF is based on the inherent timing logic in the Ring-Learning with Error (R-LWE) decryption circuit of PQC chips. FAS-PUF takes the 256*13*3-bit input ciphertext of the decryption circuit as the challenge and takes the 256-bit decryption output as the response under adjustable overclocking settings. Since the entropy source of FAS-PUF is the manifested timing errors caused by the overclocking setting, FAS-PUF does not need to change the existing hardware circuits, which preserves the original circuit functions while significantly reducing hardware resource consumption and power overhead. Meanwhile, to mitigate the influence of circuits’ sub-stable state on PUF stability under overclocking settings, a dynamic system clock frequency selection method is used to determine the optimal frequency point for extracting the PUF responses. FAS-PUF is also a strong PUF with a Challenge/Response Pair (CRP) space containing 2^256 CRPs.