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Presentations
Low-Complexity Pseudo Direct Learning Digital Pre-Distortion Architecture for Nonlinearity and Memory Effect of Power Amplifier in mmWave Baseband Transmitter
Presented Date:Jul 07, 12:10pm UTCID: 1137
Presenter(s): Hung-Chih Liu
3-Stage Pipelined Hierarchical SRAMs with Burst Mode Read in 65nm LSTP CMOS
Presented Date:Jul 07, 12:10pm UTCID: 1768
Presenter(s): Mukesh Kumar Srivastav
Fair Scheduling Through Collaborative Filtering on Multicore Systems
Presented Date:Jul 07, 12:10pm UTCID: 1980
Presenter(s): Ourania Spantidi
A 65nm Compute-in-Memory 7T SRAM Macro Supporting 4-Bit Multiply and Accumulate Operation by Employing Charge Sharing
Presented Date:Jul 07, 12:10pm UTCID: 1505
Presenter(s): Dinesh Kushwaha
1T1R In-Memory Compute for Winner Takes All Application in Kohonen Neural Networks
Presented Date:Jul 07, 12:10pm UTCID: 1868
Presenter(s): Aya Mouallem
Author(s): Aya Mouallem, Hussein Fadlallah, Lina Bacha, Dana El Hajj, Rachid Jamil, Dana Bazazo, Rouwaida Kanj
Chairs
Chair(s)
Display Name
Ettore Napoli
- Affiliation
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AffiliationUniversità degli Studi di Salerno
- Country
Display Name
Joseph Cavallaro
- Affiliation
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AffiliationRice University
- Country