Logic locking is used to protect intellectual properties and prevent integrated circuit piracy. The satisfiability (SAT)-based attack is one of the most powerful attacks against logic locking. The Anti-SAT logic-locking scheme is subject to the removal and AppSAT attacks. To address these vulnerabilities, the G-Anti-SAT block has been proposed. However, in both of these schemes, the resiliency to the SAT attack is dependent on a single product term with a large number of literals in the logic-locking function. The corresponding gates can be easily identified by analyzing the signal probability skew. Once they are removed, the logic-locking block is no longer resistant to the SAT attack. This paper proposes a new logic-locking scheme whose function has check board patterns in the corresponding K-map. Due to the unique patterns, the resistance to the SAT attack is no longer dependent on a single product term. Even if some of the gates are removed, the design is still resistant to the SAT attack.