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AffiliationVirginia Polytechnic Institute and State University
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This paper proposes an M-PSK (M-ary Phase Shift Keying) polar transmitter, which features low power dissipation, low design complexity, and compact core size. The key blocks of the proposed transmitter are a ring oscillator and a charge control unit, which dynamically set the amount of charge to draw from the output node of the oscillator. The charge drawn from the output node effectively shifts the phase of the output voltage waveform of the oscillator. It enables the transmitter to perform the phase shift keying by controlling of the amount of the charge to draw. The transmitter is laid out in TSMC 180 nm CMOS process technology. Post layout simulations show that the transmitter can achieve the data rate of 40 Mbps with the error vector magnitude (EVM) of 3.7% for 16-PSK signals.