The innovative stacking architecture of 3D NAND flash offers a promising solution to increase the capacity of flash memory. Such compact architectures, however, cause varied kinds of errors because of the hardware nature. Specially, retention errors are primary causes of read retries in high-density flash memory, which are induced by charge leakage over time. This paper proposes a generalized mathematical model to estimate the error rate caused by retention errors on the granularity of block. In addition, we validate the model on four commercial 3D NAND flash products, and the experimental results verify the accuracy of our proposed estimation model.